標準號：IEC/TS 61945-2000
中文標準名稱：集成電路 生產線批準 工藝和失效分析方法
英文標準名稱：Integrated circuits - Manufacturing line approval - Methodology for technology and failure analysis
標準類型：L56
發布日期：1999/12/31 12:00:00
實施日期：1999/12/31 12:00:00
中國標準分類號：L56
國際標準分類號：31.200
適用范圍：This technical specification gives the methodology for technology and failure analysis in manufacturing integrated circuits. Taking into account the level of complexity of techniques and means to be used, the present technical specification covers the classification of several levels of technology analysis that may be used for semiconductors and defines for each level: - the objective to be performed (or goal); - the points to be investigated; - the tools and techniques needed for currently available technologies to perform these objectives. Technology analysis is used to determine the way a component is built by observing it using adequate resolution, which increases progressively with the level of analysis. In addition, it allows detection of any fault potentially affecting the reliability of the devices under typical working conditions. It may be used to verify the conformance of a device to its manufacturing documents, but may also be used to determine the physical and chemical characteristics of the device under test. The points observed during the analysis can also serve as guidelines for an expert in a future quality audit of a manufacturing line. By using similar or case-specific means, the failure analysis leads to identifying the physical reasons of a failure found in a device during a test or during normal working conditions. Through a deep knowledge of the component and of its intrinsic failure mechanisms, the technology analysis can prepare for future failure analyses. This technical specification is considered as a suitable test methodology when referred to in an application document. Such documents shall indicate the specific conditions for its application.